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stm32 /stm32wb /STM32WB15_CM4 /Flash /SFR

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Interpret as SFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SFSA0 (FSD)FSD 0 (DDS)DDS

Description

Secure flash start address register

Fields

SFSA

Secure flash start address
FSD

Flash security disable
DDS

Disable Cortex M0 debug access

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32