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stm32 /stm32wb /STM32WB15_CM4 /HSEM /RLR4

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Interpret as RLR4

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PROCID0COREID0 (LOCK)LOCK

Description

Semaphore 4 read lock read lock register

Fields

PROCID

Semaphore ProcessID
COREID

Semaphore CoreID
LOCK

lock indication

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32