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stm32 /stm32wb /STM32WB50_CM4 /HSEM /HWCFGR1

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Interpret as HWCFGR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0NBSEM0NBINT

Description

Semaphore hardware configuration register 1

Fields

NBSEM

Hardware Configuration number of semaphores
NBINT

Hardware Configuration number of interrupts supported number of master IDs

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32