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stm32 /stm32wb /STM32WB50_CM4 /RCC /C2APB3SMENR

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Interpret as C2APB3SMENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BLESMEN)BLESMEN 0 (SMEN802)SMEN802

Description

CPU2 APB3SMENR

Fields

BLESMEN

BLE interface clocks enable during CPU2 Sleep mode
SMEN802

802.15.4 interface clocks enable during CPU2 Sleep modes

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32