Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32wb/STM32WB10_CM4/SYSCFG/SCSR#0x0
SCSR
SRAM2 Erase
SRAM2 busy by erase operation
CPU2 SRAM fetch (execution) disable.
https://github.com/modm-io/cmsis-svd-stm32