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stm32 /stm32wb /STM32WB55_CM0P /EXTI /RTSR2

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Interpret as RTSR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RT33)RT33 0RT40_41

Description

rising trigger selection register

Fields

RT33

Rising trigger event configuration bit of Configurable Event input
RT40_41

Rising trigger event configuration bit of Configurable Event input

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32