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stm32 /stm32wb /STM32WB55_CM0P /PKA /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (START)START 0 (SECLVL)SECLVL 0MODE0 (PROCENDIE)PROCENDIE 0 (RAMERRIE)RAMERRIE 0 (ADDRERRIE)ADDRERRIE

Description

Control register

Fields

EN

Peripheral Enable
START

Start the operation
SECLVL

Security Enable
MODE

PKA Operation Mode
PROCENDIE

End of operation interrupt enable
RAMERRIE

RAM error interrupt enable
ADDRERRIE

Address error interrupt enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32