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stm32 /stm32wb /STM32WB55_CM0P /PWR /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PVDE)PVDE 0PLS0 (PVME1)PVME1 0 (PVME3)PVME3 0 (USV)USV

Description

Power control register 2

Fields

PVDE

Power voltage detector enable
PLS

Power voltage detector level selection
PVME1

Peripheral voltage monitoring 1 enable: VDDUSB vs. 1.2V
PVME3

Peripheral voltage monitoring 3 enable: VDDA vs. 1.62V
USV

VDDUSB USB supply valid

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32