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stm32 /stm32wb /STM32WB55_CM0P /PWR /PDCRE

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Interpret as PDCRE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4

Description

Power Port E pull-down control register

Fields

PD0

Port E pull-down bit y (y=0…15)
PD1

Port E pull-down bit y (y=0…15)
PD2

Port E pull-down bit y (y=0…15)
PD3

Port E pull-down bit y (y=0…15)
PD4

Port E pull-down bit y (y=0…15)

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32