Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32wb/STM32WB10_CM4/RCC/C2APB3SMENR#0x0
CPU2 APB3SMENR
BLE interface clocks enable during CPU2 Sleep mode
802.15.4 interface clocks enable during CPU2 Sleep modes
https://github.com/modm-io/cmsis-svd-stm32