stm32 /stm32wb /STM32WB55_CM4 /DBGMCU /APB1FZR1

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Interpret as APB1FZR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_TIMER2_STOP)DBG_TIMER2_STOP 0 (DBG_RTC_STOP)DBG_RTC_STOP 0 (DBG_WWDG_STOP)DBG_WWDG_STOP 0 (DBG_IWDG_STOP)DBG_IWDG_STOP 0 (DBG_I2C1_STOP)DBG_I2C1_STOP 0 (DBG_I2C3_STOP)DBG_I2C3_STOP 0 (DBG_LPTIM1_STOP)DBG_LPTIM1_STOP

Description

APB1 Low Freeze Register CPU1

Fields

DBG_TIMER2_STOP

Debug Timer 2 stopped when Core is halted

DBG_RTC_STOP

RTC counter stopped when core is halted

DBG_WWDG_STOP

WWDG counter stopped when core is halted

DBG_IWDG_STOP

IWDG counter stopped when core is halted

DBG_I2C1_STOP

Debug I2C1 SMBUS timeout stopped when Core is halted

DBG_I2C3_STOP

Debug I2C3 SMBUS timeout stopped when core is halted

DBG_LPTIM1_STOP

Debug LPTIM1 stopped when Core is halted

Links

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