Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32wb/STM32WB30_CM4/HSEM/C2IER0#0x0
HSEM Interrupt enable register
CPU(2) semaphore m enable bit.
https://github.com/modm-io/cmsis-svd-stm32