Regviz

stm32 /stm32wb /STM32WB55_CM4 /SAI1 /GCR

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Interpret as GCR

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https://regviz.com/r/stm32/stm32wb/STM32WB55_CM0P/SAI1/GCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SYNCIN 0SYNCOUT

Description

Global configuration register

Fields

SYNCIN

Synchronization inputs
SYNCOUT

Synchronization outputs

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32