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stm32 /stm32wb /STM32WB55_CM4 /SAI1 /PDMDLY

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Interpret as PDMDLY

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DLYM1L 0DLYM1R 0DLYM2L 0DLYM2R 0DLYM3L 0DLYM3R 0DLYM4L 0DLYM4R

Description

PDM delay register

Fields

DLYM1L

Delay line for first microphone of pair 1
DLYM1R

Delay line for second microphone of pair 1
DLYM2L

Delay line for first microphone of pair 2
DLYM2R

Delay line for second microphone of pair 2
DLYM3L

Delay line for first microphone of pair 3
DLYM3R

Delay line for second microphone of pair 3
DLYM4L

Delay line for first microphone of pair 4
DLYM4R

Delay line for second microphone of pair 4

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32