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stm32 /stm32wb0 /STM32WB05 /GPIOA /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ID0)ID0 0 (ID1)ID1 0 (ID2)ID2 0 (ID3)ID3 0 (ID8)ID8 0 (ID9)ID9 0 (ID10)ID10 0 (ID11)ID11

Description

IDR register

Fields

ID0

ID0: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID1

ID1: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID2

ID2: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID3

ID3: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID8

ID8: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID9

ID9: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID10

ID10: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port
ID11

ID11: Port A input data bit.These bits are read-only. They contain the input value of the corresponding I/O port

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32