Regviz

stm32 /stm32wb0 /STM32WB05 /RADIO_REG_REG /VIT_CONF_DIG_ENG

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Interpret as VIT_CONF_DIG_ENG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VIT_EN)VIT_EN 0SPARE

Description

VIT_CONF_DIG_ENG register

Fields

VIT_EN

Viterbi enable
SPARE

spare

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32