Regviz

stm32 /stm32wb0 /STM32WB05 /SYSTEM_CTRL /BLERXTX_IBER

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as BLERXTX_IBER

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wb0/STM32WB07/SYSTEM_CTRL/BLERXTX_IBER#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TX_IBE)TX_IBE 0 (RX_IBE)RX_IBE

Description

BLERXTX_IBER register

Fields

TX_IBE

TX_IBE: interrupt edge register on TX_SEQUENCE signal: 0: detection on single edge (default). 1: detection on both edges
RX_IBE

RX_IBE: interrupt edge register on RX_SEQUENCE signal: 0: detection on single edge (default). 1: detection on both edges

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32