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stm32 /stm32wb0 /STM32WB05 /WAKEUP_REG /WAKEUP_CM0_IRQ_ENABLE

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Interpret as WAKEUP_CM0_IRQ_ENABLE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WAKEUP_IT)WAKEUP_IT

Description

WAKEUP_CM0_IRQ_ENABLE register

Fields

WAKEUP_IT

CPU wakeup interrupt enable:

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32