CR6 register
| EWU12 | EWU12 Enable WakeUp line 12 (PA0) When this bit is set the wakeup line 12 is enabled and a rising or falling edge on wakeup line 0 will trigger a CPU wakeup event depending on CR7.WP0 bit. |
| EWU13 | EWU13 Enable WakeUp line 13 (PA1) When this bit is set the wakeup line 13 is enabled and a rising or falling edge on wakeup line 1 will trigger a CPU wakeup event depending on CR7.WP1 bit. |
| EWU14 | EWU14 Enable WakeUp line 14 (PA2) When this bit is set the wakeup line 14 is enabled and a rising or falling edge on wakeup line 2 will trigger a CPU wakeup event depending on CR7.WP2 bit. |
| EWU15 | EWU15 Enable WakeUp line 15 (PA3) When this bit is set the wakeup line 15 is enabled and a rising or falling edge on wakeup line 3 will trigger a CPU wakeup event depending on CR7.WP3 bit. |
| EWU16 | EWU16 Enable WakeUp line 16 (PB12) When this bit is set the wakeup line 16 is enabled and a rising or falling edge on wakeup line 4 will trigger a CPU wakeup event depending on CR7.WP4 bit. |
| EWU17 | EWU17 Enable WakeUp line 17 (PB13) When this bit is set the wakeup line 17 is enabled and a rising or falling edge on wakeup line 5 will trigger a CPU wakeup event depending on CR7.WP5 bit. |
| EWU18 | EWU18 Enable WakeUp line 18 (PB14) When this bit is set the wakeup line 18 is enabled and a rising or falling edge on wakeup line 6 will trigger a CPU wakeup event depending on CR7.WP6 bit. |
| EWU19 | EWU19 Enable WakeUp line 19 (PB15) When this bit is set the wakeup line 19 is enabled and a rising or falling edge on wakeup line 7 will trigger a CPU wakeup event depending on CR7.WP7 bit. |
| EWU20 | Enable wakeup on PB8 I/O event. |
| EWU21 | Enable wakeup on PB9 I/O event. |
| EWU22 | Enable wakeup on PB10 I/O event. |
| EWU23 | Enable wakeup on PB11 I/O event. |
| EWU24 | Enable wakeup on PA12 I/O event. |
| EWU25 | Enable wakeup on PA13 I/O event. |
| EWU26 | Enable wakeup on PA14 I/O event. |
| EWU27 | Enable wakeup on PA15 I/O event. |