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stm32 /stm32wb0 /STM32WB06 /RADIO /FSM_STATUS_DIG_OUT

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Interpret as FSM_STATUS_DIG_OUT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0STATUS0 (SYNTH_CAL_ERROR)SYNTH_CAL_ERROR

Description

FSM_STATUS_DIG_OUT register

Fields

STATUS

RF FSM state:
SYNTH_CAL_ERROR

PLL calibration error

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32