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stm32 /stm32wb0 /STM32WB07 /ADC /IRQ_STATUS

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Interpret as IRQ_STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EOC_IRQ)EOC_IRQ 0 (EODS_IRQ)EODS_IRQ 0 (EODF_IRQ)EODF_IRQ 0 (EOS_IRQ)EOS_IRQ 0 (AWD_IRQ)AWD_IRQ 0 (OVR_DS_IRQ)OVR_DS_IRQ 0 (OVR_DF_IRQ)OVR_DF_IRQ 0 (DF_OVRFL_IRQ)DF_OVRFL_IRQ

Description

Interrupt Status register

Fields

EOC_IRQ

(Used in test mode only): set when the ADC conversion is completed.
EODS_IRQ

set when the Down Sampler conversion is completed.
EODF_IRQ

set when the decimation filter conversion is completed
EOS_IRQ

set when a sequence of conversion is completed
AWD_IRQ

set when an analog watchdog event occurs
OVR_DS_IRQ

set to indicate a Down Sampler overrun (at least one data is lost)
OVR_DF_IRQ

set to indicate a decimation filter overrun (a data is lost)
DF_OVRFL_IRQ

set to indicate the decimation filter is saturated.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32