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stm32 /stm32wb0 /STM32WB07 /PKA /PKA_CSR

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Interpret as PKA_CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GO)GO 0 (READY)READY 0 (SFT_RST)SFT_RST

Description

PKA_CSR register

Fields

GO

PKA start processing command. Writing 0 has no effect Writing 1 starts the encryption engine
READY

PKA readiness status. 0: The PKA is still computing 1: The PKA is ready to start a new calculation
SFT_RST

PKA software reset. Writing 0 clears the bit and releases the PKA block reset. Writing 1 resets the PKA block. The PKA RAM content is not changed.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32