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stm32 /stm32wb0 /STM32WB07 /RRM /BLE_IRQ_ENABLE

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Interpret as BLE_IRQ_ENABLE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PORT_GRANT)PORT_GRANT 0 (PORT_RELEASE)PORT_RELEASE 0 (PORT_CMD_START)PORT_CMD_START 0 (PORT_CMD_END)PORT_CMD_END

Description

BLE_IRQ_ENABLE register

Fields

PORT_GRANT

IP_BLE Port grant interrupt enable
PORT_RELEASE

IP_BLE Port release interrupt enable
PORT_CMD_START

IP_BLE Port command start interrup enable
PORT_CMD_END

IP_BLE Port command end interrup enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32