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stm32 /stm32wb0 /STM32WB07 /RRM /UDRA_CTRL0

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Interpret as UDRA_CTRL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RELOAD_RDCFGPTR)RELOAD_RDCFGPTR

Description

UDRA_CTRL0 register

Fields

RELOAD_RDCFGPTR

reload the radio configuration pointer from RAM.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32