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stm32 /stm32wb0 /STM32WB07 /TIM1 /AF2

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Interpret as AF2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BK2INE)BK2INE 0 (BK2CMP1E)BK2CMP1E 0 (BK2CMP2E)BK2CMP2E 0 (BK2INP)BK2INP 0 (BK2CMP1P)BK2CMP1P 0 (BK2CMP2P)BK2CMP2P

Description

AF2 register

Fields

BK2INE

BRK2 BKIN input enable.
BK2CMP1E

BRK2 COMP1 enable.
BK2CMP2E

BRK2 COMP2 enable.
BK2INP

BRK2 BKIN2 input polarity
BK2CMP1P

BRK2 COMP1 input polarity.
BK2CMP2P

BRK2 COMP2 input polarity.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32