Regviz

stm32 /stm32wb0 /STM32WB09 /RADIO /AGC10_DIG_ENG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AGC10_DIG_ENG

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wb0/STM32WB05/RADIO_REG_REG/AGC10_DIG_ENG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ATT_IF_0 0 (ATT_LNA_0)ATT_LNA_0 0ATT_ANT_0

Description

AGC10_DIG_ENG register

Fields

ATT_IF_0

Attenuation at IF Level for the AGC step 0:
ATT_LNA_0

Attenuation at LNA Level for the AGC step 0:
ATT_ANT_0

Attenuation at Antenna Level for the AGC step 0:

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32