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stm32 /stm32wb0 /STM32WB09 /RADIO /CR0_DIG_ENG

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Interpret as CR0_DIG_ENG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CR_GAIN_AFTER 0CR_GAIN_BEFORE

Description

CR0_DIG_ENG register

Fields

CR_GAIN_AFTER

Set the gain of the clock recovery loop before Access Address detection to the value
CR_GAIN_BEFORE

Set the gain of the clock recovery loop before Access Address detection to the value

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32