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stm32 /stm32wb0 /STM32WB09 /SYSTEM_CTRL /PWRC_ISCR

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Interpret as PWRC_ISCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BORH_ISC)BORH_ISC 0 (PVD_ISC)PVD_ISC 0 (WKUP_ISC)WKUP_ISC

Description

PWRC_ISCR register

Fields

BORH_ISC

BORH_ISC: BORH interrupt status. 0: no pending interrupt. 1: voltage went under BORH threshold / interrupt occurred (if enabled). Cleared by writing 1 in the bit.
PVD_ISC

PVD_ISC: Programmable Voltage Detector status. 0: no pending interrupt. 1: voltage went under programmed threshold / interrupt occurred (if enabled). Cleared by writing 1 in the bit.
WKUP_ISC

WKUP_ISC: Indicates the Power Controller receives a Wakeup event. 0: no pending interrupt. 1: Wakeup event on PWRC occurred / interrupt occurred (if enabled). Cleared by writing 1 in the bit. This flag will be read at 1 if a wakeup event arrives so close to the low power mode entry requests that the PWRC aborts before shutting down the system.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32