WUPEN1=B_0x0, WUPEN2=B_0x0, WUPEN7=B_0x0, WUPEN3=B_0x0, WUPEN5=B_0x0, WUPEN8=B_0x0, WUPEN6=B_0x0, WUPEN4=B_0x0
PWR wakeup control register 1
WUPEN1 | Wakeup and interrupt pin WKUP1 enable Access can be secured by PWR WUP1SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP1 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP1 enabled |
WUPEN2 | Wakeup and interrupt pin WKUP2 enable Access can be secured by PWR WUP2SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP2 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP2 enabled |
WUPEN3 | Wakeup and interrupt pin WKUP3 enable Access can be secured by PWR WUP3SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP3 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP3 enabled |
WUPEN4 | Wakeup and interrupt pin WKUP4 enable Access can be secured by PWR WUP4SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP4 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP4 enabled |
WUPEN5 | Wakeup and interrupt pin WKUP5 enable Access can be secured by PWR WUP5SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP5 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP5 enabled |
WUPEN6 | Wakeup and interrupt pin WKUP6 enable Access can be secured by PWR WUP6SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP6 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP6 enabled |
WUPEN7 | Wakeup and interrupt pin WKUP7 enable Access can be secured by PWR WUP7SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP7 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP7 enabled |
WUPEN8 | Wakeup and interrupt pin WKUP8 enable Access can be secured by PWR WUP8SEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV. 0 (B_0x0): Wakeup and interrupt pin WKUP8 disabled 1 (B_0x1): Wakeup and interrupt pin WKUP8 enabled |