stm32 /stm32wba5 /STM32WBA50 /SYSCFG /SYSCFG_CFGR1

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Interpret as SYSCFG_CFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)BOOSTEN 0 (B_0x0)ANASWVDD 0 (B_0x0)PA6_FMP 0 (B_0x0)PA7_FMP 0 (B_0x0)PA15_FMP 0 (B_0x0)PB3_FMP

PA7_FMP=B_0x0, PB3_FMP=B_0x0, ANASWVDD=B_0x0, BOOSTEN=B_0x0, PA15_FMP=B_0x0, PA6_FMP=B_0x0

Description

SYSCFG configuration register 1

Fields

BOOSTEN

I/O analog switch voltage booster enable Access can be protected by GTZC_TZSC ADC4SEC. Note: Refer to Table121 for setting.

0 (B_0x0): I/O analog switches are supplied by VsubDDA/sub voltage.

1 (B_0x1): I/O analog switches are supplied by a dedicated voltage booster (supplied by VsubDD/sub).

ANASWVDD

GPIO analog switch control voltage selection Access can be protected by GTZC_TZSC ADC4SEC. Note: Refer to Table121 for setting.

0 (B_0x0): I/O analog switches are supplied by VsubDDA/sub or booster when booster is ON.

1 (B_0x1): I/O analog switches are supplied by VsubDD/sub.

PA6_FMP

Fast-mode Plus drive capability activation on PA6 This bit can be read and written only with secure access if PA6 is secure in GPIOA. This bit enables the Fast-mode Plus drive mode for PA6 when PA6 is not used by I2C peripheral. This can be used to dive a LED for instance. Access can be protected by GPIOA SEC6.

0 (B_0x0): PA6 pin operates in standard mode when not used by I2C peripheral

1 (B_0x1): Fast-mode Plus mode is enabled on PA6 pin and the GPIO speed control is bypassed.

PA7_FMP

Fast-mode Plus drive capability activation on PA7 This bit can be read and written only with secure access if PA7 is secure in GPIOA. This bit enables the Fast-mode Plus drive mode for PA7 when PA7 is not used by I2C peripheral. This can be used to dive a LED for instance. Access can be protected by GPIOA SEC7.

0 (B_0x0): PA7 pin operates in standard mode when not used by I2C peripheral

1 (B_0x1): Fast-mode Plus mode is enabled on PA7 pin and the GPIO speed control is bypassed.

PA15_FMP

Fast-mode Plus drive capability activation on PA15 This bit can be read and written only with secure access if PA15 is secure in GPIOA. This bit enables the Fast-mode Plus drive mode for PA15 when PA15 is not used by I2C peripheral. This can be used to dive a LED for instance. Access can be protected by GPIOA SEC15.

0 (B_0x0): PA15 pin operates in standard mode when not used by I2C peripheral

1 (B_0x1): Fast-mode Plus mode is enabled on PA15 pin and the GPIO speed control is bypassed.

PB3_FMP

Fast-mode Plus drive capability activation on PB3 This bit can be read and written only with secure access if PB3 is secure in GPIOB. This bit enables the Fast-mode Plus drive mode for PB3 when PB3 is not used by I2C peripheral. This can be used to dive a LED for instance. Access can be protected by GPIOB SEC3.

0 (B_0x0): PB3 pin operates in standard mode when not used by I2C peripheral

1 (B_0x1): Fast-mode Plus mode is enabled on PAB3 pin and the GPIO speed control is bypassed.

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