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stm32 /stm32wba5 /STM32WBA52 /GPIOA /GPIOA_AFRL

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Interpret as GPIOA_AFRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFSEL00AFSEL10AFSEL20AFSEL30AFSEL50AFSEL60 (B_0x0)AFSEL7

AFSEL7=B_0x0

Description

GPIO port A alternate function low register

Fields

AFSEL0

Alternate function selection for port I/O pin 0
AFSEL1

Alternate function selection for port I/O pin 1
AFSEL2

Alternate function selection for port I/O pin 2
AFSEL3

Alternate function selection for port I/O pin 3
AFSEL5

Alternate function selection for port I/O pin 5
AFSEL6

Alternate function selection for port I/O pin 6
AFSEL7

Alternate function selection for port I/O pin 7 These bits are written by software to configure alternate function I/Os. Access can be protected by GPIOA SECy.

0 (B_0x0): AF0

1 (B_0x1): AF1

2 (B_0x2): AF2

3 (B_0x3): AF3

4 (B_0x4): AF4

5 (B_0x5): AF5

6 (B_0x6): AF6

7 (B_0x7): AF7

8 (B_0x8): AF8

9 (B_0x9): AF9

10 (B_0xA): AF10

11 (B_0xB): AF11

12 (B_0xC): AF12

13 (B_0xD): AF13

14 (B_0xE): AF14

15 (B_0xF): AF15

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32