TIDLE=B_0x0, TIMOUTEN=B_0x0, TEXTEN=B_0x0
I2C timeout register
| TIMEOUTA | Bus Timeout A This field is used to configure: The SCL low timeout condition tsubTIMEOUT/sub when TIDLE=0 tsubTIMEOUT/sub= (TIMEOUTA+1) x 2048 x tsubI2CCLK/sub The bus idle condition (both SCL and SDA high) when TIDLE=1 tsubIDLE/sub= (TIMEOUTA+1) x 4 x tsubI2CCLK/sub Note: These bits can be written only when TIMOUTEN=0. |
| TIDLE | Idle clock timeout detection Note: This bit can be written only when TIMOUTEN=0. 0 (B_0x0): TIMEOUTA is used to detect SCL low timeout 1 (B_0x1): TIMEOUTA is used to detect both SCL and SDA high timeout (bus idle condition) |
| TIMOUTEN | Clock timeout enable 0 (B_0x0): SCL timeout detection is disabled 1 (B_0x1): SCL timeout detection is enabled: when SCL is low for more than tsubTIMEOUT/sub (TIDLE=0) or high for more than tsubIDLE /sub(TIDLE=1), a timeout error is detected (TIMEOUT=1). |
| TIMEOUTB | Bus timeout B This field is used to configure the cumulative clock extension timeout: In master mode, the master cumulative clock low extend time (tsubLOW:MEXT/sub) is detected In slave mode, the slave cumulative clock low extend time (tsubLOW:SEXT/sub) is detected tsubLOW:EXT/sub= (TIMEOUTB+1) x 2048 x tsubI2CCLK/sub Note: These bits can be written only when TEXTEN=0. |
| TEXTEN | Extended clock timeout enable 0 (B_0x0): Extended clock timeout detection is disabled 1 (B_0x1): Extended clock timeout detection is enabled. When a cumulative SCL stretch for more than tsubLOW:EXT /subis done by the I2C interface, a timeout error is detected (TIMEOUT=1). |