RNGSEL=B_0x0
RCC peripherals independent clock configuration register 2
| RNGSEL | RNGSEL kernel clock source selection These bits allow to select the RNG kernel clock source. Access can be secured by GTZC_TZSC RNGSEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with RCC SPRIV or when non-secure with RCC NSPRIV. 0 (B_0x0): LSE selected 1 (B_0x1): LSI selected 2 (B_0x2): HSI16 selected 3 (B_0x3): pll1qclk divide by 2 selected |