RCC clock configuration register 3
PPRE7 | APB7 prescaler Set and cleared by software to control the division factor of the APB7 clock (pclk7). 0xx: hclk1 not divided 4 (B_0x4): hclk1 divided by 2 5 (B_0x5): hclk1 divided by 4 6 (B_0x6): hclk1 divided by 8 7 (B_0x7): hclk1 divided by 16 |