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stm32 /stm32wba5 /STM32WBA54 /TIM16 /TIM_OR1

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Interpret as TIM_OR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)HSE32EN

HSE32EN=B_0x0

Description

TIM option register 1

Fields

HSE32EN

HSE Divided by 32 enable

This bit enables the HSE divider by 32 for the tim_ti1_in3. See Table 296: Interconnect to the tim_ti1 input multiplexer for details.

0 (B_0x0): HSE divided by 32 disabled

1 (B_0x1): HSE divided by 32 enabled

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32