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stm32 /stm32wba5 /STM32WBA54 /TIM2 /TIM_ARR

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Interpret as TIM_ARR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ARR

Description

TIM auto-reload register

Fields

ARR

Auto-reload value

ARR is the value to be loaded in the actual auto-reload register.

Refer to the Section 29.4.3: Time-base unit on page 1245 for more details about ARR update and behavior.

The counter is blocked while the auto-reload value is null.

Non-dithering mode (DITHEN = 0)

The register holds the auto-reload value.

Dithering mode (DITHEN = 1)

The register holds the integer part in ARR[31:4]. The ARR[3:0] bitfield contains the dithered part.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32