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stm32 /stm32wba5 /STM32WBA55 /GTZC1_TZSC /GTZC1_TZSC_CR

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Interpret as GTZC1_TZSC_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LCK

LCK=B_0x0

Description

GTZC1 TZSC control register

Fields

LCK

lock the configuration of GTZC1_TZSC_SECCFGRn and GTZC1_TZSC_PRIVCFGRn registers until next reset This bit is cleared by default and once set, it can not be reset until system reset.

0 (B_0x0): configuration of all GTZC1_TZSC_SECCFGRn and GTZC1_TZSC_PRIVCFGRn registers not locked

1 (B_0x1): configuration of all GTZC1_TZSC_SECCFGRn and GTZC1_TZSC_PRIVCFGRn registers locked

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32