stm32 /stm32wba5 /STM32WBA55 /HSEM /HSEM_SIER

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Interpret as HSEM_SIER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SISE

SISE=B_0x0

Description

HSEM secure interrupt enable register

Fields

SISE

Secure interrupt semaphore x enable bit This bit is read and written by software. When semaphore x PRIVx is disabled, bit x can be accessed with secure privilege and secure unprivileged access. When semaphore x PRIVx is enabled, bit x can be accessed only with secure privilege access. secure unprivileged write to this bit is discarded, secure unprivileged read return 0 value.

0 (B_0x0): Secure interrupt generation for semaphore x is disabled (masked).

1 (B_0x1): Secure interrupt generation for semaphore x is enabled (not masked).

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