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stm32 /stm32wba5 /STM32WBA55 /LPUART1 /LPUART_ICR

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Interpret as LPUART_ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PECF)PECF 0 (FECF)FECF 0 (NECF)NECF 0 (ORECF)ORECF 0 (IDLECF)IDLECF 0 (TCCF)TCCF 0 (CTSCF)CTSCF 0 (CMCF)CMCF

Description

LPUART interrupt flag clear register

Fields

PECF

Parity error clear flag

Writing 1 to this bit clears the PE flag in the LPUART_ISR register.
FECF

Framing error clear flag

Writing 1 to this bit clears the FE flag in the LPUART_ISR register.
NECF

Noise detected clear flag

Writing 1 to this bit clears the NE flag in the LPUART_ISR register.
ORECF

Overrun error clear flag

Writing 1 to this bit clears the ORE flag in the LPUART_ISR register.
IDLECF

Idle line detected clear flag

Writing 1 to this bit clears the IDLE flag in the LPUART_ISR register.
TCCF

Transmission complete clear flag

Writing 1 to this bit clears the TC flag in the LPUART_ISR register.
CTSCF

CTS clear flag

Writing 1 to this bit clears the CTSIF flag in the LPUART_ISR register.
CMCF

Character match clear flag

Writing 1 to this bit clears the CMF flag in the LPUART_ISR register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32