stm32 /stm32wba5 /STM32WBA55 /PWR /PWR_VOSR

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Interpret as PWR_VOSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)VOSRDY 0 (B_0x0)VOS

VOS=B_0x0, VOSRDY=B_0x0

Description

PWR voltage scaling register

Fields

VOSRDY

Ready bit for VsubCORE/sub voltage scaling output selection Set and cleared by hardware. When decreasing the voltage scaling range, VOSRDY must be one before increasing the SYSCLK frequency.

0 (B_0x0): Not ready, voltage level VOS selected level

1 (B_0x1): Ready, voltage level greater than or equal VOS selected level

VOS

Voltage scaling range selection Set a and cleared by software. Cleared by hardware when entering Stop 1 mode. Access can be secured by RCC SYSCLKSEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with PWR SPRIV or when non-secure with PWR NSPRIV.

0 (B_0x0): Range 2 (lowest power)

1 (B_0x1): Range 1 (highest frequency).

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