SWS=B_0x0, MCOPRE=B_0x0, MCOSEL=B_0x0, SW=B_0x0
RCC clock configuration register 1
| SW | system clock switch Set and cleared by software to select system clock source (SYSCLK). Cleared by hardware when entering Stop and Standby modes When selecting HSE32 directly or indirectly as system clock and HSE32 oscillator clock security fails, cleared by hardware. 0 (B_0x0): HSI16 selected as system clock 2 (B_0x2): HSE32 or HSE32/2, as defined by HSEPRE, selected as system clock 3 (B_0x3): pll1rclk selected as system clock |
| SWS | system clock switch status Set and cleared by hardware to indicate which clock source is used as system clock. 0 (B_0x0): HSI16 oscillator used as system clock 2 (B_0x2): HSE32 or HSE32/2, as defined by HSEPRE, used as system clock 3 (B_0x3): pll1rclk used as system clock |
| MCOSEL | microcontroller clock output Set and cleared by software. others: reserved Note: This clock output may have some truncated cycles at startup or during MCO clock source switching. 0 (B_0x0): MCO output disabled, no clock on MCO 1 (B_0x1): sysclkpre system clock after PLL1RCLKPRE division selected 3 (B_0x3): HSI16 clock selected 4 (B_0x4): HSE32 clock selected 5 (B_0x5): pll1rclk clock selected 6 (B_0x6): LSI clock selected 7 (B_0x7): LSE clock selected 8 (B_0x8): pll1pclk clock selected 9 (B_0x9): pll1qclk clock selected 10 (B_0xA): hclk5 clock selected |
| MCOPRE | microcontroller clock output prescaler Set and cleared by software. It is highly recommended to change this prescaler before MCO output is enabled. others: not allowed 0 (B_0x0): MCO divided by 1 1 (B_0x1): MCO divided by 2 2 (B_0x2): MCO divided by 4 3 (B_0x3): MCO divided by 8 4 (B_0x4): MCO divided by 16 |