RADIOCLKRDY=B_0x0, STRADIOCLKON=B_0x0, BBCLKEN=B_0x0
RCC RADIO peripheral clock enable register
| BBCLKEN | 2.4 GHz RADIO baseband kernel clock (aclk) enable Set and cleared by software. Note: The HSE32 oscillator needs to be enabled by either HSEON or STRADIOCLKON. 0 (B_0x0): 2.4 GHz RADIO baseband kernel clock disabled 1 (B_0x1): 2.4 GHz RADIO baseband kernel clock enabled |
| STRADIOCLKON | 2.4 GHz RADIO bus clock enable and HSE32 oscillator enable by 2.4 GHz RADIO sleep timer wakeup event Set by hardware on a 2.4 GHz RADIO sleep timer wakeup event. Cleared by software writing zero to this bit. Note: Before accessing the 2.4 GHz RADIO registers the RADIOCLKRDY bit must be checked. 0 (B_0x0): 2.4 GHz RADIO bus clock and HSE32 oscillator not requested by 2.4 GHz RADIO sleep timer wakeup event. 1 (B_0x1): 2.4 GHz RADIO bus clock and HSE32 oscillator enabled by 2.4 GHz RADIO sleep timer wakeup event |
| RADIOCLKRDY | 2.4 GHz RADIO bus clock ready. Set and cleared by hardware to indicate that the 2.4 GHz RADIO bus clock is ready and the 2.4 GHz RADIO registers can be accessed. Note: Once both RADIOEN and STRADIOCLKON are cleared, RADIOCLKRDY goes low after three hclk5 clock cycles. 0 (B_0x0): 2.4 GHz RADIO bus clock not ready 1 (B_0x1): 2.4 GHz RADIO bus clock ready |