IPMEE=B_0x0, MCLR=B_0x0
SYSCFG memory erase status register
| MCLR | Device memories erase status This bit is set by hardware when SRAM2, ICACHE, PKA SRAM erase is completed after power-on reset or tamper detection (refer to Section75: Tamper and backup registers (TAMP) for more details). This bit is not reset by system reset and is cleared by software by writing 1 to it. 0 (B_0x0): Memory erase ongoing if not yet cleared by software 1 (B_0x1): Memory erase done |
| IPMEE | ICACHE and PKA SRAM erase status This bit is set by hardware when ICACHE and PKA SRAM erase is completed after potential tamper detection (refer to Section75: Tamper and backup registers (TAMP) for more details). This bit is cleared by software by writing 1 to it. 0 (B_0x0): ICACHE and PKA SRAM erase ongoing if not yet cleared by software 1 (B_0x1): ICACHE and PKA SRAM erase done |