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stm32 /stm32wl /STM32WL5x_CM0P /PKA /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (START)START 0MODE0 (PROCENDIE)PROCENDIE 0 (RAMERRIE)RAMERRIE 0 (ADDRERRIE)ADDRERRIE

Description

control register

Fields

EN

PKA enable.
START

start the operation
MODE

PKA operation code
PROCENDIE

PROCENDIE
RAMERRIE

RAM error interrupt enable
ADDRERRIE

Address error interrupt enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32