Regviz

stm32 /stm32wl /STM32WL5x_CM0P /PWR /SR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SR1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wl/STM32WL5x_CM0P/PWR/SR1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF1)WUF1 0 (WUF2)WUF2 0 (WUF3)WUF3 0 (WPVDF)WPVDF 0 (WRFBUSYF)WRFBUSYF 0 (C2HF)C2HF 0 (WUFI)WUFI

Description

Power status register 1

Fields

WUF1

Wakeup flag 1
WUF2

Wakeup flag 2
WUF3

Wakeup flag 3
WPVDF

Wakeup PVD flag
WRFBUSYF

Radio BUSY wakeup flag
C2HF

PU2 Hold interrupt flag
WUFI

Internal wakeup interrupt flag

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32