stm32 /stm32wl /STM32WL5x_CM0P /RCC /AHB2ENR

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Interpret as AHB2ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOAEN)GPIOAEN 0 (GPIOBEN)GPIOBEN 0 (GPIOCEN)GPIOCEN 0 (GPIOHEN)GPIOHEN

Description

AHB2 peripheral clock enable register

Fields

GPIOAEN

CPU1 IO port A clock enable

GPIOBEN

CPU1 IO port B clock enable

GPIOCEN

CPU1 IO port C clock enable

GPIOHEN

CPU1 IO port H clock enable

Links

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