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stm32 /stm32wl /STM32WL5x_CM0P /RCC /AHB2RSTR

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Interpret as AHB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOARST)GPIOARST 0 (GPIOBRST)GPIOBRST 0 (GPIOCRST)GPIOCRST 0 (GPIOHRST)GPIOHRST

Description

AHB2 peripheral reset register

Fields

GPIOARST

IO port A reset
GPIOBRST

IO port B reset
GPIOCRST

IO port C reset
GPIOHRST

IO port H reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32