stm32 /stm32wl /STM32WL5x_CM0P /RCC /APB1ENR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as APB1ENR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2EN)TIM2EN 0 (RTCAPBEN)RTCAPBEN 0 (WWDGEN)WWDGEN 0 (SPI2S2EN)SPI2S2EN 0 (USART2EN)USART2EN 0 (I2C1EN)I2C1EN 0 (I2C2EN)I2C2EN 0 (I2C3EN)I2C3EN 0 (DAC1EN)DAC1EN 0 (LPTIM1EN)LPTIM1EN

Description

APB1 peripheral clock enable register 1

Fields

TIM2EN

CPU1 TIM2 timer clock enable

RTCAPBEN

CPU1 RTC APB clock enable

WWDGEN

CPU1 Window watchdog clock enable

SPI2S2EN

CPU1 SPI2S2 clock enable

USART2EN

CPU1 USART2 clock enable

I2C1EN

CPU1 I2C1 clocks enable

I2C2EN

CPU1 I2C2 clocks enable

I2C3EN

CPU1 I2C3 clocks enable

DAC1EN

CPU1 DAC1 clock enable

LPTIM1EN

CPU1 Low power timer 1 clocks enable

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