stm32 /stm32wl /STM32WL5x_CM0P /RCC /CSR

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Interpret as CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSION)LSION 0 (LSIRDY)LSIRDY 0 (LSIPRE)LSIPRE 0MSISRANGE 0 (RFRSTF)RFRSTF 0 (RFRST)RFRST 0 (RMVF)RMVF 0 (RFILARSTF)RFILARSTF 0 (OBLRSTF)OBLRSTF 0 (PINRSTF)PINRSTF 0 (BORRSTF)BORRSTF 0 (SFTRSTF)SFTRSTF 0 (IWDGRSTF)IWDGRSTF 0 (WWDGRSTF)WWDGRSTF 0 (LPWRRSTF)LPWRRSTF

Description

Control/status register

Fields

LSION

LSI oscillator enable

LSIRDY

LSI oscillator ready

LSIPRE

LSI frequency prescaler

MSISRANGE

MSI clock ranges

RFRSTF

Radio in reset status flag

RFRST

Radio reset

RMVF

Remove reset flag

RFILARSTF

Radio illegal access flag

OBLRSTF

Option byte loader reset flag

PINRSTF

Pin reset flag

BORRSTF

BOR flag

SFTRSTF

Software reset flag

IWDGRSTF

Independent window watchdog reset flag

WWDGRSTF

Window watchdog reset flag

LPWRRSTF

Low-power reset flag

Links

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