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stm32 /stm32wl /STM32WL5x_CM4 /ADC /DR

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Interpret as DR

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https://regviz.com/r/stm32/stm32wb/STM32WB10_CM4/ADC/DR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DATA

Description

ADC data register

Fields

DATA

DATA

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32